1. Field of the Invention
The present invention relates to an active type solid-state imaging device using a metal-oxide-semiconductor (hereinafter, referred to as MOS), field-effect transistor (herein after, referred to as FET), or a junction gate FET. More particularly, to an active type solid-state imaging device which can realize an excellent performance and a lower driving voltage.
2. Description of the Related Art
A charge-coupled device (CCD) type solid-state imaging device has been widely used in various fields as a featuring device of a solid-state imaging device. In a CCD type imaging device; signal charges, which are photoelectrically-converted and accumulated by a photodiode or an MOS diode, are transferred via a CCD transferring channel to a high-sensitivity charge detection portion and converted there into voltage signals. That is why, the CCD type imaging device has a higher S/N ratio and a larger output voltage.
However, in order to meet the demand that such an imaging device should be smaller-sized and have a larger number of pixels, the size of a pixel to be used should be smaller and the amount of charges that can be transferred by a CCD should be reduced. Consequently, there have occurred serious problems such as a scale-down of the dynamic range, a remarkable increase of the power consumption, and the like. Because a larger amount of load capacity and a higher driving voltage are required to drive the entire CCD device by several phases of clocks, a larger number of pixels requires a larger amount of power.
In order to solve these problems, an active type imaging device is proposed in which signal charges generated in respective pixels are not read out by themselves, but read out by a scanning circuit after the signals charges have been amplified in the respective pixels. Such a device eliminates the limit of the amount of the signals to be read out, and makes a dynamic range broader than that of a CCD type imaging device. Moreover, in such a device, since the signals are read out by driving the pixels to be read out only in a horizontal and a perpendicular line and with a lower voltage, a smaller amount of power consumption is required than that of a CCD type imaging device.
In such a device, a transistor is generally employed to amplify the signals in a pixel, therefore an SIT type, a bipolar type, an FET type (an MOS type or a junction type), and the like have been proposed. Since it is generally easier to employ MOSFETs as a scanning circuit, considering the configuration of the device, it is more advantageous to use an FET type pixels. More preferably, it is advantageous to use a device in which only a single FET is contained inside a pixel in order to increase the pixel density. A charge modulation device (CMD) type, a floating gate array (FGA) type, and a bulk charge modulation device (BCMD) type have been reported as an active type imaging device.
FIGS. 32A and 32B show CMD type pixels of a conventional active type solid-state imaging device, in which a plurality of pixels are arranged in a matrix, as shown in these figures. FIG. 32A is a plan view of the pixels, and FIG. 32B is a cross-sectional view taken along a line L--L in FIG. 32A. FIG. 33 shows a distribution of the potentials in a perpendicular direction taken along a line M--M in FIG. 32B. These FIGS. 32A, 32B and 33 are shown in Nakamura et al., "Gate-accumulation type MOS phototransistor image sensor", 1986 Television Academy, p. 57. As is apparent from FIGS. 32A and 32B, an n-well 2 is formed as a buried channel in a p-substrate 1. A gate electrode 3 is formed on the n-well 2 interposing an insulating film 6. A source region 4 and a drain region 5 composed of a highly-concentrated n-layer and separated by the n-well 2 are formed in the n-well 2. The gate electrodes 3 of the respective pixels are connected in common to gate terminals 7 in a horizontal direction, and the respective source regions 4 are connected in common to source terminals 8 in a vertical direction.
An operation of the CMD type pixel will be described with reference to FIG. 33. First, at the time of signal accumulation, a gate voltage is set to be a voltage V.sub.L and signal charges (holes) generated by photoelectric conversion are accumulated in an interface between the semiconductor and the insulating film. Then, at the time of signal reading, the gate voltage is set to be a voltage V.sub.M which is a higher potential than the voltage V.sub.L and a current between the source and the drain regions 4 and 5 varies in accordance with the amount of the signal charges. The varied value of the current is read out as a signal output. The other pixels on the same source terminal 8 are not detected because the gate voltage is in a V.sub.L level. At the time of the resetting operation, by which signal charges are cleared to be ready for the next signal accumulation, the gate voltage is set to be a voltage V.sub.H, so that the potential in the substrate decreases along a direction perpendicular to the substrate. The signal charges (holes) accumulated in the interface between the n-well 2 and the insulating film 6 are then discharged into the substrate 1 under the interface, as shown by the broken lines in FIG. 32B.
A conventional CMD type imaging device has following shortcomings. First, the gate voltage at the time of the resetting operation must be very high because the concentration of the impurity in the buried n-well channel layer should be set to be high so that the density of the accumulated signal charges may be high. For example, a case of employing the following Condition 1 will be analyzed. This Condition 1 will be cited again in the examples of the present invention described later.
Condition 1!
Concentration of the substrate: N.sub.P =1.0.times.10.sup.15 cm.sup.-3 PA0 Concentration of the n-layer: N.sub.N =3.0.times.10.sup.15 cm.sup.-3 PA0 Thickness of the n-layer: d.sub.N =1.5 .mu.m PA0 Thickness of the gate insulating film: d.sub.O =80 nm PA0 1) The signal charges are converted into electrons and accumulated in the buried channel n-layer 12. PA0 2) The potential variation of the p-layer 13 caused by the signal charges are detected as a variation of the threshold value of the P-MOS structure. PA0 3) At the time of the resetting operation, the gate voltage is set to be lower (V.sub.L) and the signal charges are discharged into the n-substrate 10.
Using this condition, the condition where the potential decreases linearly from the surface of the n-well 2 to the p-substrate 1 is expressed as follows: ##EQU1##
As a result, the gate voltage V.sub.H required for the resetting operation is 20.0 V if a flat band voltage V.sub.FB is -0.85 V, so the gate voltage V.sub.H is an impractical value.
In a conventional CMD type imaging device, another problem occurs that the depletion of the interface between the n-well 2 and the insulating film 6 causes the generation of a considerable dark current.
An FGA type imaging device is employed among the FET type active type imaging devices to reduce the generation of the dark current. FIG. 34A shows a partial plan view of an FGA type imaging device. FIG. 34B shows the cross section of a pixel taken along the line N--N in FIG. 34A, and FIG. 34C shows the potential distributions in a direction taken along the line O--O in FIG. 34B. This prior art shown in these figures is described in J. Hynecek, "A New Device Architecture Suitable for High-Resolution and High-Performance Image Sensor", IEEE Trans. Elec. Dev., p. 646 (1988).
This FGA type device is different from the CMD type device in that a p-layer 9 in a relatively high concentration is provided on the n-well 2 under the gate electrode 3. A gate voltage is set to be V.sub.L at the time of the signal accumulation and the signal reading, and the variation of the channel potential of the n-well layer 2 is detected as a variation of the threshold value in accordance with the accumulation of the signal charges (holes) in the p-layer 9. The other pixels on the same signal line are not detected because the gate voltage is in a V.sub.L level only at the time of the signal reading. In this FGA type device, a similar resetting operation is conducted to that of the CMD type device, i.e. the gate voltage is set to be V.sub.H which makes a potential in the substrate decrease linearly in a direction perpendicular to the substrate. The signal charges (holes) accumulated in the p-layer 9 are discharged into the substrate 1 under the p-layer 9. According to this structure the p-layer 9 is not depleted even at the time of the resetting operation, so the generation of the dark current is reduced. However, if the p-layer 9 is not depleted at the time of the resetting operation, the signal charges are not completely transferred. Consequently, the generation of residual images and the increase of resetting noise cannot be prevented.
A BCMD type device is proposed to improve the defects of the FGA type device in J. Hynecek, "BCMD--An Improved Photosite Structure for High Density Image Sensor", IEEE Trans. Elec. Dev., p. 1011 (1991). FIG. 35A shows a cross section of a BCMD type pixel, and FIG. 35B shows potential distributions in a direction taken along a Line P--P of FIG. 35A. In a BCMD type device, a p-layer 11, an n-layer 12 and a p-layer 13 are stacked in this order on an n-substrate 10. And p-layers in a high concentration 14 for a source electrode and a drain electrode are formed so as to reach the p-layer 11 through the n-layer 12 and the p-layer 13.
This BCMD type device is different from the FGA type in the following points:
Accordingly, the complete transfer of the signal charges is accomplished. However, the p-n-p-n multi-layered structure of this device makes it difficult to optimize the driving conditions, and makes the fabrication steps complicated.
Moreover, in all the active type imaging devices currently proposed, including the CMD type, the FGA type, and the BCMD type devices, a problem still remains unsolved that the fixed patter n noises (FPNs) generate because of the dispersion of the signal levels and the amplification rates of the respective pixels.
In order to solve the above-mentioned problems, according to the present invention, a novel active type solid-state imaging device is provided in which a wide dynamic range and a driving at a lower voltage are realized by using a simplified structure and the generation of the dark current and the FPN is reduced.